1. Field of the Invention
The present invention relates to a semiconductor device having an image sensor function and to a method of manufacturing the same. More specifically, the present invention relates to a semiconductor device in which a photoelectric conversion element and a transistor are formed on an insulating surface and to a method of manufacturing the same.
Note that, in this specification, the term semiconductor device generally refers to devices that utilize semiconductor characteristics to function, and includes as a category electrooptical devices, semiconductor circuits, and electronic equipment.
2. Description of the Related Art
In recent years, various kinds of sensors have been developed and put into practical use with accompanying technology advancement thereof. One type of those sensors are semiconductor devices having an image sensor function, which are used to capture text and image information on paper or the like into personal computers.
Examples of this type of semiconductor devices include digital still cameras, scanners, and copying machines. Digital still cameras are used as replacements for conventional silver film cameras, and have area sensors in which pixels are arranged two-dimensionally. Scanners and copying machines are used as means for reading text and image information on paper, and have line sensors in which pixels are arranged one-dimensionally.
A semiconductor device having an image sensor function is provided with a pixel portion that has a plurality of pixels. Each of the pixels has a photoelectric conversion element and one or a plurality of transistors selected from a transistor that functions as a switching element of the photoelectric conversion element, a transistor for amplifying a signal of the photoelectric conversion element, and a transistor for erasing a signal of the photoelectric conversion element.
A photoelectric conversion element often used is a PIN photodiode. Also used are a PN photodiode, an avalanche diode, an npn embedded diode, a Schottky diode, and a phototransistor. An x-ray photoconductor and an infrared sensor are also photoelectric conversion elements.
Semiconductor devices having an image sensor function are roughly divided into CCD type and CMOS type. CMOS type semiconductor devices are further classified into passive semiconductor devices to which amplifying transistors are not mounted and active semiconductor devices to which amplifying transistors are mounted. An amplifying transistor has a function of amplifying an image signal of is a subject read by a photoelectric conversion element.
An active semiconductor device has, in addition to an amplifying transistor as above, a sensor selecting transistor and the like. Accordingly, the number of elements in one pixel in an active semiconductor device is larger than in a passive semiconductor device.
When manufacturing the semiconductor devices described above, a transistor is formed first on an insulating surface and then a photoelectric conversion element is formed. The photoelectric conversion element is often a PIN junction element obtained by layering three thin films. Accordingly, manufacture of a semiconductor device having a photoelectric conversion element and a transistor requires at least three masks for forming a p type semiconductor layer, a photoelectric conversion layer, and an n type semiconductor layer, in addition to the number of masks for forming the transistor.
In manufacture of a semiconductor device that has a transistor and a photoelectric conversion element on an insulating surface, the manufacturing process is complicated and has a large number of steps. An increase in number of steps leads to increased manufacturing cost as well as reduction in manufacture yield.
When three additional masks are required for forming a p type semiconductor layer, a photoelectric conversion layer, and an n type semiconductor layer in addition to the number of the masks for forming a transistor on an insulating surface, the manufacturing process of the semiconductor device becomes laborious and the yield could be greatly reduced since lowering in yield in each step is multiplied in the final yield. Furthermore, the additional masks prolong manufacture time and therefore increase manufacturing cost.
Manufacture of the semiconductor device employs the photolithography technique. The photolithography technique uses a photo mask to form on a substrate a photoresist pattern that serves as a mask in an etching step. The introduction of one photo mask involves addition of various steps such as formation of a coat, etching of the coat, resist peeling, washing, and drying in the resist application step, pre-bake step, exposure step, development step, and post-bake step, and in the preceding and following steps thereof. The additional steps make the manufacture of the semiconductor device even more laborious. Reducing steps in number can be an effective measure in improving the productivity and yield. However, manufacturing cost can be reduced only to a limited degree unless the number of photo masks is reduced.
The present invention has been made in view of the circumstances described above, and an object of the present invention is therefore to reduce the number of masks for forming a photoelectric conversion element, which is added to the number of masks necessary for forming a transistor only, in a method of manufacturing a semiconductor device having a transistor and a photoelectric conversion element formed on an insulating surface. Another object of the present invention is to simplify a semiconductor device manufacturing process, improve the yield, and to reduce a manufacturing cost of a semiconductor device by reducing the number of masks. Still another object of the present invention is to provide a semiconductor device manufactured in accordance with the above method of manufacturing a semiconductor device.
The present inventors have devised three major manufacturing methods as means for attaining the above objects. Descriptions of the methods are given below. A photoelectric conversion element in this specification is a PIN junction element that has a p type semiconductor layer, a photoelectric conversion layer (i layer), and an n type semiconductor layer.
According to a first aspect of the present invention, there is provide a method of manufacturing a semiconductor device, characterized by comprising the steps of: forming a semiconductor on an insulating surface; forming a first insulating film on the semiconductor; forming a gate electrode on the first insulating film that is in contact with the semiconductor; doping the semiconductor with an impurity element that gives one conductivity type to form a first impurity region; using a mask formed on the semiconductor to dope the semiconductor with an impurity element that gives the other conductivity type (opposite to the one conductivity type) and form a second impurity region; forming a second insulating film on the first and second impurity regions; forming contact holes in the second insulating film so that the contact holes reach the first and second impurity regions; forming a metal film so as to cover the contact holes; forming from the metal film wiring lines that are connected to the first and second impurity regions, and then removing a part of the metal film that is in contact with a photoelectric conversion layer that later makes a photoelectric conversion element; and forming an amorphous semiconductor to be brought into contact with the first and second impurity regions where the metal film is removed.
According to a second aspect of the present invention, there is provided a method of manufacturing a semiconductor device, characterized by comprising the steps of: forming a first semiconductor on an insulating surface; forming a first insulating film on the first semiconductor; patterning the first semiconductor and the first insulating film to form a second semiconductor and a second insulating film at the same time; forming a third semiconductor on the second insulating film; patterning the third semiconductor while using the second insulating film as an etching stopper to form a fourth semiconductor; forming a third insulating film on the second and fourth semiconductors; forming a gate electrode only on the third insulating film that is in contact with the second and fourth semiconductors; doping the second and fourth semiconductors with an impurity element that gives one conductivity type to form first impurity regions; and using a mask formed on the second and fourth semiconductors to dope the second and fourth semiconductors with an impurity element that gives the other conductivity type (opposite to the one conductivity type) and form second impurity regions.
According to a third aspect of the present invention, there is provided a method of manufacturing a semiconductor device, characterized by comprising the steps of: forming a first semiconductor on an insulating surface; forming a first insulating film on the first semiconductor; patterning the first semiconductor and the first insulating film to form a second semiconductor and a second insulating film at the same time; forming a third semiconductor on the second insulating film; forming a fourth semiconductor on the third semiconductor; patterning the third and fourth semiconductors at once while using the second insulating film as an etching stopper to form fifth and sixth semiconductors; forming a third insulating film on the second, fifth, and sixth semiconductors; forming a gate electrode only on the third insulating film that is in contact with the second semiconductor; doping the second and sixth semiconductors with an impurity element that gives one conductivity type to form first impurity regions; and using a mask formed on the second, fifth, and sixth semiconductors to dope the second and sixth semiconductors with an impurity element that gives the other conductivity type (opposite to the one conductivity type) and form second impurity regions.
In a manufacturing method of the present invention, semiconductor layers functioning as a source region, a drain region, and a channel formation region of a transistor are formed at the same time an n type semiconductor layer and p type semiconductor layer of a photoelectric conversion element are formed. Connection wiring lines to be electrically connected to the n type semiconductor layer and the p type semiconductor layer of the photoelectric conversion element are formed at the same time a source wiring line and a drain wiring line of a transistor are formed. In a step of doping an impurity element that gives one conductivity type, a semiconductor layer of an n-channel transistor and the n type semiconductor layer of the photoelectric conversion element are simultaneously doped with the impurity element and a semiconductor layer of a p-channel transistor and the p type semiconductor layer of the photoelectric conversion element are simultaneously doped with the impurity element.
Masks used in the method of manufacturing a semiconductor device of the present invention can be reduced in number by employing the above manufacturing process. According to the present invention, the number of masks used in a semiconductor device manufacturing process including formation of a photoelectric conversion element and a transistor on an insulating surface can be reduced and therefore the manufacturing process is simplified. As a result, the manufacture yield is improved and manufacturing cost is reduced.
In the following description of preferred embodiments, the first manufacturing method, the second manufacturing method, and the third manufacturing method are described in detail in Embodiment Mode 1, Embodiment Mode 2, and Embodiment Mode 3, respectively.
In the accompanying drawings:
FIGS. 1A to 1C are diagrams showing a process of manufacturing a semiconductor device of the present invention;
FIGS. 2A to 2C are diagrams showing a process of manufacturing a semiconductor device of the present invention;
FIG. 3 is a diagram showing a process of manufacturing a semiconductor device of the present invention;
FIGS. 4A to 4C are diagrams showing a process of manufacturing a semiconductor device of the present invention;
FIGS. 5A to 5C are diagrams showing a process of manufacturing a semiconductor device of the present invention;
FIGS. 6A and 6B are diagrams showing a process of manufacturing a semiconductor device of the present invention;
FIGS. 7A to 7C are diagrams showing a process of manufacturing a semiconductor device of the present invention;
FIGS. 8A to 8C are diagrams showing a process of manufacturing a semiconductor device of the present invention;
FIGS. 9A and 9B are diagrams showing a process of manufacturing a semiconductor device of the present invention;
FIG. 10 is a block diagram of a semiconductor device to which the present invention is applied;
FIG. 11 is a diagram showing a pixel portion in a semiconductor device of the present invention;
FIG. 12 is a diagram showing a pixel portion of a semiconductor device of the present invention;
FIG. 13 is a circuit diagram of a semiconductor device to which the present invention is applied;
FIG. 14 is a circuit diagram of a semiconductor device to which the present invention is applied;
FIG. 15 is a timing chart of signals applied to the pixel portion;
FIG. 16 is a diagram showing a sectional structure of a semiconductor device of the present invention;
FIG. 17 is a diagram showing a sectional structure of a semiconductor device of the present invention;
FIG. 18 is a diagram showing a sectional structure of a semiconductor device of the present invention;
FIG. 19 is a block diagram of a semiconductor device to which the present invention is applied;
FIG. 20 is a circuit diagram of a semiconductor device to which the present invention is applied;
FIG. 21 is a circuit diagram of a semiconductor device to which the present invention is applied;
FIG. 22 is a diagram showing the exterior of a semiconductor device of the present invention;
FIG. 23A is a top view of a semiconductor device of the present invention and FIGS. 23B and 23C are sectional views thereof;
FIGS. 24A to 24D are diagrams showing examples of electronic equipment to which the present invention is applied; and
FIGS. 25A to 25C are diagrams showing examples of electronic equipment to which the present invention is applied.